Minimum Qualifications A minimum of 7 years of industry work experience in: o RTL-level design of modern processors o Micro-architecture in one or more of the following areas: Instruction fetch and decode, branch prediction, breakpoint logic, integer and floating point execution pipelines, datapaths o RTL logic design for synthesis to meet power, frequency and area targets o Understanding tradeoffs of functionality, performance & physical implementation o General assembly language of modern GPUs or DSPs o Industry-standard RTL simulation and debug tools o Design of test benches using Verilog, System Verilog, or UVM o Perl or another similar scripting languages o Experience interfacing with various teams o Strong interpersonal skills focused on finding the best solutions Education Requirements Bachelor of Computer Science and/or Electrical Engineering (BSCS and/or BSEE). Preferred: Master of Computer Science and/or Electrical Engineering or equivalent experience (MSCS and/or MSEE)